AdvancedMultiple choice
Two threads each increment their own atomic counter, and throughput is far worse than a single thread’s. What is the likeliest cause?
- ALock contention on the shared mutex protecting them
- BFalse sharing – the counters sit on one cache line
- CThe atomic operations are simply slow on this hardware
- DThe compiler has failed to inline the increment
The worked solution is in Premium
The answer, the full working and the one idea to take away – for this and all 1,322 questions in the bank. Answer it in practice and your working is marked, with a known mistake named when you make one.
Learn the method
Latency, the memory hierarchy and why the tail is the number
Reported in interviews at
More systems and low latency questions
- An L1 cache reference costs about 1 ns and a main-memory reference about 100 ns.Foundation
- You sort 1,000 latency samples in ascending order.Foundation
- A timestamp counter ticks at 3 GHz. How many ticks elapse in one microsecond?Foundation
- A burst on the feed, part 1 of 4Foundation
- Two systems: one has a mean of 2 μs and a p99.9 of 2 ms, the other a mean of 5…Applied
- You collect one million latency samples.Applied